Global clock calibration for an SAR ADC interface

This paper presents the interface circuit which incorporates the technique of analog value to digital value conversion utilising a self clocking method. The architecture consists of the Globally Asynchronous and Locally Synchronous (GALS) building blocks, where the processing hardware is being realized by the set of smaller slices of similar structure, each running synchronously with independent clocks. This is used in different real-time commercial applications like digital filtering, fourier transform applications. The described architecture will allow for loadbalancing depending specifically on the input load which is present in all of the used processing units. The architecture itself leads to process tolerance since it capable of detecting process variations in each and every individually present processing module and is able to finely determine the appropriate operating frequency that is finely applicable for each of the modules. Once the clock acting as a local circuit has been appropriately adjusted, it needs no further precision measurement and calculation. Also, it is efficiently free from the various changes occurring mainly because of the different and unique environmental effects. The main consideration has been laid for the efficient and the proper kind of established communication between the present modules used in the interfacing. Keywords— GALS, ADC, clock skew, asynchronous interconnect, SAR